soc-design jobs in San Diego

Senior ASIC engineer responsible for defining, modeling, designing (digital and/or analog), optimizing, verifying, validating, implementing, and documenting IP blocks and SoCs for high-performance, low-power products. Design and architecture duties span RTL-to-GDS flow, circuit specifications, logic design, system simulation, timing, power analysis, and design verification.…See more Requires 2+ years of ASIC design/verification experience (or equivalent with advanced degree) and proficiency with EDA tools, scripting, and design verification methodologies. Works independently with cross-functional collaboration and produces detailed technical documentation.

Senior Technical Program Manager leading ASIC/SOC development programs from architecture through post-silicon validation. Manages cross-functional engineering teams across pre-silicon phases (architecture, RTL design, verification, FPGA prototyping, physical design, tapeout) and post-silicon phases (silicon bring-up, functional validation, NPI).…See more Drives project execution, technical trade-offs, and coordination with internal teams, foundries, and external partners to meet power, performance, schedule, cost, and quality requirements. Requires 7+ years managing ASIC teams, 5+ years technical program management, and 3+ years software development experience.

Qualcomm seeks a Principal Engineer to design and develop low-level firmware for CPU bootstrapping, power management, and debug functionality in embedded SoCs. The role requires deep expertise in computer architecture (memory consistency, coherency, virtualization, security), ARM/RISC-V ISA, and multi-core CPU software stacks, with responsibility for defining 3–5 year software roadmaps and coordinating with Arm architects and third-party partners.…See more The candidate will troubleshoot high-performance microarchitecture issues (prefetching, speculation, memory ordering) and drive software–hardware trade-offs across heterogeneous compute platforms. 8+ years of software engineering experience with strong C/C++ skills and 15+ years in embedded systems, real-time development, and low-level drivers/firmware is expected.

SoC Design and Integration Engineer at Qualcomm responsible for RTL design, architecture, and integration of high-performance ASICs for data center and AI applications. The role involves hands-on design and verification of complex chips, system simulation, large-scale design integration, and collaboration with cross-functional teams.…See more Candidates should have proven ASIC/FPGA design experience, knowledge of server/data center protocols, and expertise in arithmetic or machine-learning IP design. The position also values scripting, process automation, and the ability to identify flow improvements and provide silicon learnings feedback.

Staff-level software engineer responsible for designing, developing, and maintaining debug software across firmware, operating systems, platform software, and host tooling at the system level. The role requires deep expertise in debugging complex SoCs and high-performance CPU architectures, including JTAG, trace, and crash analysis, with proficiency in C, C++, assembly, and Python.…See more You will troubleshoot integrated system defects, collaborate across hardware and firmware teams to identify root causes, and drive technical decisions during design and debug reviews. This position demands strong systems knowledge, independent technical ownership, and the ability to influence architectural decisions across a cross-functional organization.

AMD is seeking an AI Systems Security Architect to drive system-wide threat modeling and security analysis across hardware, firmware, and software platforms. The role involves designing secure debug architectures, writing platform security specifications, and leveraging AI-assisted engineering tooling to accelerate security analysis.…See more The ideal candidate has deep expertise in computer architecture, confidential computing, root of trust, boot chain architecture, firmware security, cryptography, and threat modeling at platform scope, with proficiency in C/C++ and experience securing AI/ML workloads at datacenter scale.

Principal System Lead responsible for translating AI-driven use cases into scalable, power-efficient implementations on Qualcomm's mobile SoCs. The role spans the full AI stack—generative AI, diffusion models, on-device inference, and camera-centric workloads—requiring deep knowledge of AI software frameworks and optimization across performance, latency, memory, and power constraints.…See more You will define system-level architectural enhancements for AI accelerators, CPUs, GPUs, and memory subsystems, working across hardware, software, and platform teams to align designs with OEM product roadmaps. The position demands 8+ years of semiconductor product development experience, 5+ years in technical leadership, and strong ability to solve complex AI system challenges through quantitative analysis and cross-functional collaboration.

Develop FPGA-based solutions using hybrid C/C++ and HDL architectures, designing component interfaces to analog/digital converters and microcontrollers. Build robust data acquisition and analysis systems for health monitoring, perform integration and verification testing, and collaborate across firmware, hardware, and software teams.…See more Requires 2+ years of FPGA/embedded development experience, proficiency in C/C++, Xilinx Vivado/Vitis, and device communication protocols (SPI, I2C, Ethernet, Serial). This role requires access to export-controlled information and U.S. person status.

Qualcomm seeks a CPU Software Architecture Staff Engineer to design and develop low-level firmware for CPU bootstrapping, power management, and debug systems on Snapdragon chipsets. The role involves defining short- and long-term software architecture roadmaps aligned with ARM and RISC-V ISA evolution, coordinating debugging of high-performance microarchitecture issues, and engaging with partners like Google and Microsoft.…See more The candidate will work across multiple SoC technology domains—memory consistency, coherency, virtualization, security, and heterogeneous compute platforms—requiring 10+ years of embedded systems experience with deep C/C++ expertise and comprehensive knowledge of ARM or RISC-V architectures.

As a NoC Interconnect Design Engineer and Architect at Qualcomm, you will define, model, design, optimize, and verify network-on-chip IP blocks and SoCs for high-performance, low-power products. You will create architectures and circuit specifications based on system requirements, support the RTL-to-GDS implementation flow, and collaborate with cross-functional teams to meet customer needs.…See more The role requires hands-on use of EDA tools (RTL synthesis, place-and-route, timing/power analysis, and custom design tools like Virtuoso) and technical documentation. You will work under supervision on digital and/or analog design tasks that span from high-level specification through physical implementation.

Qualcomm seeks a CPU Software Architecture Sr. Staff Engineer to design and develop low-level firmware for CPU bootstrapping, power management, and debug capabilities in Snapdragon chipsets.…See more The role involves defining CPU software architecture roadmaps across Arm and RISC-V ISAs, analyzing CPU microarchitecture trade-offs (prefetching, speculation, memory ordering), and coordinating with internal teams and external partners like Arm, Google, and Microsoft. The candidate will demonstrate deep expertise in computer architecture domains such as memory consistency, coherency, virtualization, and security, with 15+ years of embedded systems experience and strong C/C++ proficiency.

Senior Staff Center of Excellence Emulation Engineer responsible for executing emulation test plans, developing and optimizing complex SoC and subsystem hardware models across Synopsys, Cadence, and Siemens platforms. The role involves collaborating with RTL design, verification, and firmware teams to debug cross-layer issues, automate emulation flows through scripting, and drive performance optimization.…See more Requires 5–7 years of emulation experience (or 3–5 with advanced degree), expertise in SystemVerilog/UVM, and strong knowledge of processor architecture, I/O protocols, and memory technologies.

Lead Arm's SoC interconnect technology team as a senior architect with 15+ years of experience designing large-scale SoCs. Own performance modeling, microarchitecture, RTL design, and verification strategy for interconnect IP; drive adoption of industry standards (AMBA AXI/ACE/CHI, etc.) across CPU, GPU, NPU, and memory subsystems.…See more Mentor a team of architects and engineers while leading complex projects to tape-out, with expertise in coherent protocols, cache coherency, latency/bandwidth/power optimization, and system-level debug.

Head of Silicon Systems and Architecture role leading Google's XR silicon strategy and roadmap. Responsibilities include defining multi-year silicon architecture across main processors, co-processors, and connectivity; architecting split-compute topologies for low-latency offloading; optimizing perception and GenAI workloads for edge computing; and bridging technical alignment between Core Tech, Platform SW, Hardware, and external chipset vendors.…See more Requires 8+ years in silicon engineering, system integration, and hardware design; 5+ years in technical leadership with direct reports; and proven success shipping consumer electronics to mass production.

As an Always On Power Management Firmware Engineer at Qualcomm, you will develop embedded firmware for managing power distribution and thermal budgets in SoC Always-On subsystems. Working with hardware and firmware teams, you will design and implement power management solutions, characterize IPs, and engage with third parties on platform enablement.…See more The role requires 4+ years of ASIC design/verification experience and proficiency with scripting, programming languages, and design verification methods. You will collaborate with cross-functional teams including hardware architects, software teams, and senior leadership to define implementation strategies and optimize for performance, power efficiency, and quality.

Sr. Director leading Qualcomm's next-generation AI accelerator platform software strategy, architecture, and delivery.…See more Manages multiple engineering organizations spanning system software, firmware, device drivers, AI runtimes, compilers, ML frameworks, SDKs, and validation. Defines performance and reliability goals, drives cross-functional hardware-software co-design, and partners with customers and hyperscalers. Requires 15+ years software engineering experience with 8+ years leading large, globally distributed teams; deep expertise in AI/ML stacks, compilers, runtime systems, or heterogeneous computing architectures.

Qualcomm seeks a Systems Software Power Engineer to optimize power efficiency for next-generation Snapdragon SoCs. The role spans the full lifecycle from pre-silicon modeling through post-silicon debug, requiring expertise in power architectures, control loops, and low-power techniques across hardware and software layers.…See more Key responsibilities include driving end-to-end power optimization across architecture, firmware, kernel, and Android teams; prototyping and evaluating power features; executing post-silicon power KPI validation; and developing power debug and analysis infrastructure. The position demands strong embedded software skills with hands-on experience in firmware and Linux kernel development, plus solid understanding of computer architecture, memory hierarchies, CPU/GPU design, and OS fundamentals.

Design, develop, and optimize embedded software stacks for complex SoCs with multiple core types, memory hierarchies, and bus infrastructure at Qualcomm. Lead architectural decisions for Edge AI and multimedia use cases, balancing performance and power efficiency while creating SDKs for customer development.…See more Collaborate with systems, hardware, and test engineers to define software architecture and drive optimization for ARM CPU and NPU acceleration. Requires 6+ years of software engineering experience (or 5+ with a Master's degree, 4+ with a PhD) and 3+ years with languages like C, C++, Java, or Python.