cache-coherency jobs in San Diego

Lead end-to-end DDR validation for next-generation LPDDR5X/LPDDR6 memory subsystems on AI Accelerator and mobile platforms, spanning pre-silicon through post-silicon phases. Drive memory bring-up, performance validation, system stress testing, and debug across emulation, FPGA, and silicon platforms.…See more Develop validation strategies, automation, and regression infrastructure while partnering with architecture, design, firmware, and vendor teams to resolve DDR controller, PHY, and system-level issues. Require 5+ years of DDR/memory subsystem validation experience, deep knowledge of LPDDR architectures, DDR controllers/PHYs, memory training algorithms, and strong post-silicon debug skills with C/C++ proficiency.

Qualcomm seeks a Principal Engineer to design and develop low-level firmware for CPU bootstrapping, power management, and debug functionality in embedded SoCs. The role requires deep expertise in computer architecture (memory consistency, coherency, virtualization, security), ARM/RISC-V ISA, and multi-core CPU software stacks, with responsibility for defining 3–5 year software roadmaps and coordinating with Arm architects and third-party partners.…See more The candidate will troubleshoot high-performance microarchitecture issues (prefetching, speculation, memory ordering) and drive software–hardware trade-offs across heterogeneous compute platforms. 8+ years of software engineering experience with strong C/C++ skills and 15+ years in embedded systems, real-time development, and low-level drivers/firmware is expected.

Principal System Architect role responsible for defining mobile SoC and chipset product architecture, managing trade-offs across CPUs, GPUs, DSPs, AI engines, memory subsystems, power delivery, and interconnects. Will collaborate cross-functionally with core IP, hardware design, software, and product teams to align roadmaps, set priorities, and communicate architectural decisions to technical and executive stakeholders.…See more Requires 8+ years of semiconductor product development experience, 5+ years in technical leadership, and comfort with large data sets and strategic problem-solving from undefined requirements.

Design and architect mobile SoC and chipset products, managing trade-offs across CPUs, GPUs, DSPs, AI engines, memory systems, and power grids. Lead cross-functional collaboration with core IP, hardware design, software, and product teams to define roadmaps and align development plans.…See more Communicate architectural analyses and strategic recommendations to technical and executive stakeholders. Drive innovation through top-down problem-solving and patent-eligible technical solutions.

As a CPU SoC Verification Engineer at Google, you will drive ARM-based SoC verification from RTL simulation through post-silicon debug, ensuring functional integrity of CPU subsystems. You will develop robust verification environments, execute Gate Level Simulation (GLS) and timing-annotated workflows, and partner with ATE teams to diagnose hardware failures and stabilize production patterns.…See more The role requires 4+ years of ARM SoC verification experience including cache coherency, NoC interconnects, high-speed bus protocols, and PVT corner analysis. You will translate simulation sequences into production-ready formats and debug complex hardware failures in both virtual and physical silicon environments.

Design and optimize Network-on-Chip (NoC) architectures for high-performance Qualcomm SoCs with focus on physical implementation and PPA (power, performance, area) goals. Responsibilities include floorplan-driven architecture design, physical-aware synthesis strategies, clock tree planning, power analysis, timing closure, and custom placement/routing techniques.…See more Requires deep expertise in ASIC physical design, NoC protocols (AMBA, cache coherency), and scripting in Python, Perl, TCL, and C to analyze and optimize latency, area, performance, and power metrics.

Qualcomm seeks a CPU Software Architecture Staff Engineer to design and develop low-level firmware for CPU bootstrapping, power management, and debug systems on Snapdragon chipsets. The role involves defining short- and long-term software architecture roadmaps aligned with ARM and RISC-V ISA evolution, coordinating debugging of high-performance microarchitecture issues, and engaging with partners like Google and Microsoft.…See more The candidate will work across multiple SoC technology domains—memory consistency, coherency, virtualization, security, and heterogeneous compute platforms—requiring 10+ years of embedded systems experience with deep C/C++ expertise and comprehensive knowledge of ARM or RISC-V architectures.

Qualcomm seeks a CPU Software Architecture Sr. Staff Engineer to design and develop low-level firmware for CPU bootstrapping, power management, and debug capabilities in Snapdragon chipsets.…See more The role involves defining CPU software architecture roadmaps across Arm and RISC-V ISAs, analyzing CPU microarchitecture trade-offs (prefetching, speculation, memory ordering), and coordinating with internal teams and external partners like Arm, Google, and Microsoft. The candidate will demonstrate deep expertise in computer architecture domains such as memory consistency, coherency, virtualization, and security, with 15+ years of embedded systems experience and strong C/C++ proficiency.

Senior Staff SoC Systems Performance Engineer responsible for analyzing and defining next-generation system-on-chip architectures across mobile, automotive, and compute products. The role involves conducting performance, power, and thermal analysis; deploying simulators and profilers to identify bottlenecks; and collaborating with hardware, software, and product teams to drive architectural decisions.…See more Requires 5+ years of systems engineering experience with deep knowledge of computer architecture (CPUs, GPUs, DSPs, memory hierarchies, cache coherency) and hands-on proficiency with performance modeling tools, SystemC simulators, and profiling methodologies.

Lead Arm's SoC interconnect technology team as a senior architect with 15+ years of experience designing large-scale SoCs. Own performance modeling, microarchitecture, RTL design, and verification strategy for interconnect IP; drive adoption of industry standards (AMBA AXI/ACE/CHI, etc.) across CPU, GPU, NPU, and memory subsystems.…See more Mentor a team of architects and engineers while leading complex projects to tape-out, with expertise in coherent protocols, cache coherency, latency/bandwidth/power optimization, and system-level debug.

As a CPU SoC Verification Engineer, you will drive ARM-based SoC verification from RTL simulation through post-silicon debug, ensuring functional integrity of CPU subsystems. You'll develop robust verification environments, execute Gate Level Simulation (GLS) and timing-annotated simulations, and lead debug efforts to diagnose hardware failures and stabilize high-speed patterns in production.…See more The role requires expertise in RTL verification, cache coherency, Network-on-Chip interconnects, and high-speed bus protocols, with experience translating simulation sequences into ATE-ready formats using industry-standard EDA tools.