digital-design jobs in San Diego

This role focuses on developing and validating low-level DDR subsystem firmware and APIs across the entire product lifecycle, from design validation through post-silicon bring-up. Engineers will write C firmware for DDR initialization, training, power management, and performance features, then validate it across simulation, emulation, FPGA, and silicon environments.…See more The position requires strong embedded systems fundamentals, digital design knowledge, and hands-on hardware/software debugging to collect and analyze stability, power, performance, and functional data that inform product decisions. Cross-functional collaboration with design, DV, software, and architecture teams is central to optimizing DDR subsystem capabilities.

Senior ASIC engineer responsible for defining, modeling, designing (digital and/or analog), optimizing, verifying, validating, implementing, and documenting IP blocks and SoCs for high-performance, low-power products. Design and architecture duties span RTL-to-GDS flow, circuit specifications, logic design, system simulation, timing, power analysis, and design verification.…See more Requires 2+ years of ASIC design/verification experience (or equivalent with advanced degree) and proficiency with EDA tools, scripting, and design verification methodologies. Works independently with cross-functional collaboration and produces detailed technical documentation.

As an ASIC RTL Design Engineer, you will define, model, design, optimize, verify, and validate IP blocks and SoCs for high-performance, low-power products. You will assist in creating architectures, circuit specifications, and logic designs based on system-level requirements, and collaborate with cross-functional teams to develop implementation strategies.…See more The role involves using EDA tools and RTL-to-GDS flows to execute design and supporting the evaluation of process flow from synthesis through place-and-route. You will work under supervision on tasks requiring multiple steps, planning, and problem-solving to deliver technical documentation for ASIC projects.

As a Senior Staff Hardware Engineer, you will lead the design, optimization, verification, and testing of advanced electronic systems including digital, analog, RF, optical circuits, FPGAs, and DSP systems. You will conduct complex simulations and analyses, collaborate across cross-functional teams, and drive manufacturing innovation for cutting-edge semiconductor products.…See more The role requires 6+ years of hardware engineering experience (or 5+ with a master's degree, or 4+ with a PhD), with preferred expertise in circuit/logic design, schematic capture tools, measurement instruments, and technical leadership.

Design RTL for high-performance Hexagon/NPU processor cores used in mobile SoCs, servers, IoT, and automotive applications. Work across the full ASIC design flow from RTL through GDS2, collaborating with architecture, physical design, and verification teams on timing closure, power optimization, and area reduction.…See more Develop SystemVerilog RTL, run frontend design tools (linting, CDC, LEC, CLP), and support hardware integration and design verification. Requires 2+ years of practical RTL development experience with microprocessor design knowledge.

Engineering Manager leading a power electronics and systems design team at General Atomics, responsible for technical strategy, resource allocation, team development, and customer liaison on DoD contracts. The role requires deep expertise in power electronics (analog/digital circuit design), power systems, and embedded controls, with hands-on involvement in design-through-production cycles and DoD technical review processes (SRR, PDR, CDR, TRR).…See more Must demonstrate strong project and people management skills, navigate complex technical and contractual issues, and serve as the primary technical point of contact for senior external stakeholders.

As a Camera Firmware Engineer at Qualcomm, you will define, model, design, optimize, verify, validate, implement, and document IP blocks and SoCs for high-performance camera systems. You will assist in creating architectures, circuit specifications, logic designs, and system simulations based on system-level requirements, collaborating with cross-functional teams.…See more The role requires hands-on use of ASIC design tools (RTL to GDS flow, Virtuoso) and evaluation of the design flow from high-level design through synthesis, place and route, timing, and power analysis. You will write technical documentation and support the development of implementation strategies that meet system and customer requirements.

As a NoC Interconnect Design Engineer and Architect at Qualcomm, you will define, model, design, optimize, and verify network-on-chip IP blocks and SoCs for high-performance, low-power products. You will create architectures and circuit specifications based on system requirements, support the RTL-to-GDS implementation flow, and collaborate with cross-functional teams to meet customer needs.…See more The role requires hands-on use of EDA tools (RTL synthesis, place-and-route, timing/power analysis, and custom design tools like Virtuoso) and technical documentation. You will work under supervision on digital and/or analog design tasks that span from high-level specification through physical implementation.

Lead embedded systems and controls design engineering at General Atomics, managing technical talent while generating electrical architecture solutions for complex projects. Perform mixed-signal circuit design, embedded systems development (processor, microcontroller, FPGA, MPSoC), and hardware analysis across digital, analog, and RF domains.…See more Conduct electrical engineering analyses, document findings, communicate results to stakeholders, manage technical schedules, and represent the company as a prime technical contact on contracts. Requires 11+ years of progressively complex engineering experience, active DoD Secret clearance, and expertise in FPGA platforms (Xilinx, Microsemi), RTOS, and PCB design tools.