NoC Interconnect Design Engineer and Architect

Summary

As a NoC Interconnect Design Engineer and Architect at Qualcomm, you will define, model, design, optimize, and verify network-on-chip IP blocks and SoCs for high-performance, low-power products. You will create architectures and circuit specifications based on system requirements, support the RTL-to-GDS implementation flow, and collaborate with cross-functional teams to meet customer needs. The role requires hands-on use of EDA tools (RTL synthesis, place-and-route, timing/power analysis, and custom design tools like Virtuoso) and technical documentation. You will work under supervision on digital and/or analog design tasks that span from high-level specification through physical implementation.