cxl jobs in San Diego

Design and architect RISC-V System-on-Chip (SoC) platforms, leveraging deep expertise in heterogeneous compute, interconnect, memory systems, security, and power management. Develop and improve analysis tools including functional/performance simulators and profilers using C++ and Python.…See more Apply systems engineering rigor to define SoC-level architectures across boot, debug, timebase management, and real-time control components. Candidates should have 4+ years of systems engineering or SoC/IP architecture experience and demonstrate proficiency in behavioral/performance modeling and analytical techniques.

Lead product strategy and roadmap for AI-centric data center platforms and rack-level systems, including compute nodes, interconnect fabrics, power delivery, and cooling. Define system-level requirements by collaborating with silicon architects, systems engineers, and software teams while engaging directly with hyperscale and enterprise customers to gather feedback and drive early deployments.…See more Track product performance post-launch across system metrics like power efficiency and thermal headroom, and mentor a high-performing product management team.

AMD seeks a security engineer to implement, validate, and secure AI platform features on internal test hardware and customer systems. The role spans hardware, firmware, and software security—including secure boot, attestation, key/certificate management, vulnerability analysis, and fix development and verification.…See more You will conduct security assessments, develop tooling and automation for testing and remediation, and partner across architecture, firmware, and software teams. The position requires proficiency in C/C++ and scripting languages, deep platform security knowledge (cryptography, memory safety, isolation, trusted execution environments), and experience with AI/ML infrastructure security.

AMD is seeking an AI Systems Security Architect to drive system-wide threat modeling and security analysis across hardware, firmware, and software platforms. The role involves designing secure debug architectures, writing platform security specifications, and leveraging AI-assisted engineering tooling to accelerate security analysis.…See more The ideal candidate has deep expertise in computer architecture, confidential computing, root of trust, boot chain architecture, firmware security, cryptography, and threat modeling at platform scope, with proficiency in C/C++ and experience securing AI/ML workloads at datacenter scale.

This role involves implementing, validating, and securing AI platform security features across AMD's hardware, firmware, and software stack. You will conduct security assessments, develop and verify security fixes, manage cryptographic keys and device identities, and provision secure boot and attestation mechanisms.…See more The position requires hands-on experience securing systems across hardware-firmware-software integration, proficiency in C/C++ and scripting, and familiarity with GPU/accelerator platforms, confidential computing, and trusted execution environments. You will partner with architecture, firmware, and software teams to resolve security issues and apply AI-assisted tooling to accelerate remediation and testing.

Senior Staff Center of Excellence Emulation Engineer responsible for executing emulation test plans, developing and optimizing complex SoC and subsystem hardware models across Synopsys, Cadence, and Siemens platforms. The role involves collaborating with RTL design, verification, and firmware teams to debug cross-layer issues, automate emulation flows through scripting, and drive performance optimization.…See more Requires 5–7 years of emulation experience (or 3–5 with advanced degree), expertise in SystemVerilog/UVM, and strong knowledge of processor architecture, I/O protocols, and memory technologies.

Lead Arm's SoC interconnect technology team as a senior architect with 15+ years of experience designing large-scale SoCs. Own performance modeling, microarchitecture, RTL design, and verification strategy for interconnect IP; drive adoption of industry standards (AMBA AXI/ACE/CHI, etc.) across CPU, GPU, NPU, and memory subsystems.…See more Mentor a team of architects and engineers while leading complex projects to tape-out, with expertise in coherent protocols, cache coherency, latency/bandwidth/power optimization, and system-level debug.

Define and architect next-generation SoC infrastructure hardware components including interconnect (NoC), system cache, memory controllers, and system MMU for Qualcomm SoCs. The role requires deep expertise in multi-die/chiplet architectures, industry-standard protocols (PCIe, CXL, USB, UFS, MIPI, UCIe), and HW-SW interfaces to create developer-friendly designs.…See more Responsibilities include performance modeling, RTL design flow understanding, and trade-off analysis across quality of service, power management, security, and debug features. The position demands 4+ years of systems engineering or architecture experience with a degree in electrical engineering or computer science.