circuit-design jobs in San Diego

Senior ASIC engineer responsible for defining, modeling, designing (digital and/or analog), optimizing, verifying, validating, implementing, and documenting IP blocks and SoCs for high-performance, low-power products. Design and architecture duties span RTL-to-GDS flow, circuit specifications, logic design, system simulation, timing, power analysis, and design verification.…See more Requires 2+ years of ASIC design/verification experience (or equivalent with advanced degree) and proficiency with EDA tools, scripting, and design verification methodologies. Works independently with cross-functional collaboration and produces detailed technical documentation.

As an ASIC RTL Design Engineer, you will define, model, design, optimize, verify, and validate IP blocks and SoCs for high-performance, low-power products. You will assist in creating architectures, circuit specifications, and logic designs based on system-level requirements, and collaborate with cross-functional teams to develop implementation strategies.…See more The role involves using EDA tools and RTL-to-GDS flows to execute design and supporting the evaluation of process flow from synthesis through place-and-route. You will work under supervision on tasks requiring multiple steps, planning, and problem-solving to deliver technical documentation for ASIC projects.

As a Senior Staff Hardware Engineer, you will lead the design, optimization, verification, and testing of advanced electronic systems including digital, analog, RF, optical circuits, FPGAs, and DSP systems. You will conduct complex simulations and analyses, collaborate across cross-functional teams, and drive manufacturing innovation for cutting-edge semiconductor products.…See more The role requires 6+ years of hardware engineering experience (or 5+ with a master's degree, or 4+ with a PhD), with preferred expertise in circuit/logic design, schematic capture tools, measurement instruments, and technical leadership.

As an ASIC Digital Design Engineer, you will define, model, design, optimize, verify, and validate IP blocks and SoCs for high-performance, low-power memory subsystems (HBM, LPDDR). You'll work with cross-functional teams to develop architectures, circuit specifications, and logic designs based on system requirements, using EDA tools to execute the RTL-to-GDS flow and custom circuit design workflows.…See more Responsibilities include creating system simulations, evaluating implementation strategies, and documenting technical specifications for ASIC projects.

As a NoC Interconnect Design Engineer and Architect at Qualcomm, you will define, model, design, optimize, and verify network-on-chip IP blocks and SoCs for high-performance, low-power products. You will create architectures and circuit specifications based on system requirements, support the RTL-to-GDS implementation flow, and collaborate with cross-functional teams to meet customer needs.…See more The role requires hands-on use of EDA tools (RTL synthesis, place-and-route, timing/power analysis, and custom design tools like Virtuoso) and technical documentation. You will work under supervision on digital and/or analog design tasks that span from high-level specification through physical implementation.