Sr. Implementation Engineer, Amazon Leo

Amazon.com

$185,200 – $287,500 · Posted 1 day ago

Clearance Required

San DiegoLast seen today

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Summary

Lead ASIC implementation for Amazon Leo's satellite communication chips, owning the digital SOC design flow from RTL through physical design sign-off. Develop chip power intent using UPF, set up synthesis and place-and-route flows for deep sub-micron nodes, validate timing and design closure, and coordinate with RFIC and P&R teams to ensure production-ready tapeouts. Requires 8+ years of ASIC implementation experience including synthesis, STA, and multi-power-domain design on 16nm or smaller technology nodes.

Embedded Systems 16nm Asic Design Asic Implementation Chip Design Cmos Deep Sub Micron Design For Test Dfm Dft Dsp Em Analysis Formal Verification Ir Analysis Lec Logic Equivalence Checking Modem Design Physical Design Physical Synthesis Place And Route Post P R Power Gating Power Islands Rfic Rtl Soc Design Sta Static Timing Analysis Synthesis Timing Constraints Upf Wireless Communications