SoC Interconnect Technology Team Lead

$242,760 – $314,160 · Posted 2 days ago

San DiegoLast seen today

Summary

Lead Arm's SoC interconnect technology team as a senior architect with 15+ years of experience designing large-scale SoCs. Own performance modeling, microarchitecture, RTL design, and verification strategy for interconnect IP; drive adoption of industry standards (AMBA AXI/ACE/CHI, etc.) across CPU, GPU, NPU, and memory subsystems. Mentor a team of architects and engineers while leading complex projects to tape-out, with expertise in coherent protocols, cache coherency, latency/bandwidth/power optimization, and system-level debug.

Embedded Systems AI Accelerators Amba Ace Amba Axi Amba Chi Bandwidth Optimization Cache Coherency Ccix Coherent Interconnect Protocols Cxl Dvfs Gpu Design Heterogeneous Compute Interconnect Design Latency Optimization Low Power Design Memory Hierarchy Microarchitecture ML Accelerators Network On Chip Noc Non Coherent Interconnects Npu Design Performance Analysis Performance Modeling Post Silicon Validation Power Domains Power Optimization Rtl Design Silicon Bring Up Soc Architecture Soc Design System Fabrics Tape Out Verification