power-analysis jobs in San Diego

Senior ASIC engineer responsible for defining, modeling, designing (digital and/or analog), optimizing, verifying, validating, implementing, and documenting IP blocks and SoCs for high-performance, low-power products. Design and architecture duties span RTL-to-GDS flow, circuit specifications, logic design, system simulation, timing, power analysis, and design verification.…See more Requires 2+ years of ASIC design/verification experience (or equivalent with advanced degree) and proficiency with EDA tools, scripting, and design verification methodologies. Works independently with cross-functional collaboration and produces detailed technical documentation.

As an ASIC RTL Design Engineer, you will define, model, design, optimize, verify, and validate IP blocks and SoCs for high-performance, low-power products. You will assist in creating architectures, circuit specifications, and logic designs based on system-level requirements, and collaborate with cross-functional teams to develop implementation strategies.…See more The role involves using EDA tools and RTL-to-GDS flows to execute design and supporting the evaluation of process flow from synthesis through place-and-route. You will work under supervision on tasks requiring multiple steps, planning, and problem-solving to deliver technical documentation for ASIC projects.

Verification Software Engineer at Qualcomm's Modem/Chiplet Validation & Emulation team, responsible for developing system-level validation content and automation frameworks for SoC silicon across pre- and post-silicon phases. The role requires low-level programming in C/C++, Python, and Assembly, combined with hardware-software co-debug across modem, RF, and SERDES interfaces, performance/power analysis, and lab debug tools (JTAG, logic analyzers, oscilloscopes).…See more Engineers will design scalable test frameworks, bare-metal validation content, and infrastructure for functional, concurrency, and stress testing, with exposure to cutting-edge mobile and data-center SoCs.

Staff or Senior Staff Engineer responsible for system software development on MediaTek SoC platforms, including platform board bring-up, driver development for Windows/Android/Linux, and hands-on debugging of customer issues. Requires 10+ years of C/C++ and SoC system software experience, deep knowledge of peripheral buses and OS internals, and expertise in power optimization and performance analysis.…See more Will manage multiple concurrent tasks, coordinate with customers and support teams, and provide on-site technical support.

Senior ASIC design engineer role focused on next-generation high-speed HBM, LPDDR, and DDR memory subsystem architecture and RTL implementation for Qualcomm products. Responsibilities include developing memory controller and NoC-based subsystem specifications, RTL coding, micro-architecture design, synthesis, timing closure, physical design support, and gate-level simulation.…See more The role requires 5+ years of ASIC/RTL design experience, 3+ years of hardware architecture experience, and expertise in high-speed digital design (1GHz+) interfacing with CPU, GPU, DSP, and multimedia processors.

As an ASIC Digital Design Engineer, you will define, model, design, optimize, verify, and validate IP blocks and SoCs for high-performance, low-power memory subsystems (HBM, LPDDR). You'll work with cross-functional teams to develop architectures, circuit specifications, and logic designs based on system requirements, using EDA tools to execute the RTL-to-GDS flow and custom circuit design workflows.…See more Responsibilities include creating system simulations, evaluating implementation strategies, and documenting technical specifications for ASIC projects.

Qualcomm seeks a Senior AI Performance Architect to design hardware accelerator architectures optimized for AI training at scale. The role involves analyzing GPU/accelerator architectures, defining computational blocks supporting multiple datatypes and precisions, architecting memory and scale-out systems, and codesigning hardware with software/LLM requirements.…See more Responsibilities include competitive analysis, performance modeling, and pre-silicon prediction for ML training workloads. The ideal candidate spans software architecture, algorithm development, kernel optimization, and hardware accelerator design.

As a System Performance Engineer at Qualcomm, you will optimize and validate power, performance, and thermal behavior of Snapdragon chipsets across mobile, compute, automotive, IoT, and data center platforms. You will profile complex concurrent system use-cases in emulation and software environments (Android/Linux/Windows), define performance analysis plans across CPU, GPU, and AI/ML workloads, identify optimization opportunities in SoC architecture, and triage performance issues to root cause.…See more You will collaborate with cross-functional hardware, software, and architecture teams, mentor junior engineers, and prepare technical recommendations for senior leadership. The role requires strong programming skills (Python, C/C++), deep knowledge of ARM SoC architecture, memory hierarchy, system interconnects, and hands-on experience with power/performance analysis tools and benchmarks.

As a senior-level systems engineer on Qualcomm's System Performance Team, you will optimize and validate power, performance, and thermal behavior of Snapdragon chipsets across mobile, compute, automotive, IoT, and data-center AI platforms. You will profile and analyze complex concurrent system use-cases in emulation and software environments (Android/Linux/Windows), define performance and power analysis plans across CPU, GPU, and AI/ML workloads, identify optimization opportunities in SoC hardware and software architectures, and triage root-cause issues for stakeholders.…See more You will provide technical leadership and mentorship to junior engineers, collaborate with cross-functional teams to implement solutions, and develop automation to improve team efficiency. The role requires 10+ years of post-silicon power and performance analysis experience, strong programming skills (Python, C/C++), and deep knowledge of ARM SoC architecture, memory hierarchies, system interconnects, and modern AI/LLM workloads.

As a Sr. Staff Engineer on Qualcomm's Wearables team, you will design, develop, and validate next-generation embedded software and platform technologies for wearable devices.…See more You will collaborate with cross-functional hardware, systems, and architecture teams to translate use-case requirements into system-level software solutions, oversee code quality through reviews and testing, and deploy state-of-the-art wearables algorithms into commercial products. The role requires deep expertise in modern C++, multi-core programming on heterogeneous mobile architectures (CPUs, GPUs, DSPs, tensor accelerators), and strong performance analysis and debugging skills across embedded systems.

As a Camera Firmware Engineer at Qualcomm, you will define, model, design, optimize, verify, validate, implement, and document IP blocks and SoCs for high-performance camera systems. You will assist in creating architectures, circuit specifications, logic designs, and system simulations based on system-level requirements, collaborating with cross-functional teams.…See more The role requires hands-on use of ASIC design tools (RTL to GDS flow, Virtuoso) and evaluation of the design flow from high-level design through synthesis, place and route, timing, and power analysis. You will write technical documentation and support the development of implementation strategies that meet system and customer requirements.

Senior Staff Hardware Engineer at Qualcomm responsible for planning, designing, optimizing, verifying, and testing complex electronic systems including digital/analog/RF/optical circuits, FPGAs, DSP systems, and mechanical/packaging solutions. The role requires leading cross-functional teams, conducting advanced simulations and analyses, evaluating manufacturing solutions, and mentoring junior engineers on cutting-edge semiconductor and hardware projects.…See more Requires 6+ years of hardware engineering experience (or equivalent with advanced degree) and preferred expertise in circuit/logic design validation, schematic capture tools, RF measurement instruments, and technical leadership.

As a NoC Interconnect Design Engineer and Architect at Qualcomm, you will define, model, design, optimize, and verify network-on-chip IP blocks and SoCs for high-performance, low-power products. You will create architectures and circuit specifications based on system requirements, support the RTL-to-GDS implementation flow, and collaborate with cross-functional teams to meet customer needs.…See more The role requires hands-on use of EDA tools (RTL synthesis, place-and-route, timing/power analysis, and custom design tools like Virtuoso) and technical documentation. You will work under supervision on digital and/or analog design tasks that span from high-level specification through physical implementation.

Design and verify Digital Signal Processor (DSP) architectures for Qualcomm's mobile, machine learning, automotive, and IoT products. Develop small to complex hardware blocks independently, applying high-performance microprocessor design concepts including multi-core, multi-threaded, and low-power optimization.…See more Conduct design verification, performance analysis, and architecture tradeoff evaluation using simulators, emulators, and synthesis tools. Collaborate with cross-functional teams to ensure designs meet specifications for performance, power, and timing while staying current with industry trends in machine learning and modem technologies.

Design and architect network-on-chip (NoC) interconnect components for Qualcomm SoCs, from specification through RTL delivery. Perform micro-architecture analysis, power and performance tradeoffs, and protocol compliance evaluation for bus interconnects.…See more Deliver RTL, support verification and silicon validation teams, and collaborate with software teams on interconnect deployment. Requires strong knowledge of bus protocols (AHB, AXI, CHI), ASIC design flows, VLSI fundamentals, and experience deploying IPs in large SoC projects.

Verification Software Engineer on Qualcomm's Modem/Chiplet Validation & Emulation team, responsible for developing and scaling system-level validation content and automation frameworks for pre- and post-silicon SoC validation. The role requires proficiency in C/C++, Python, and bare-metal software development, with hands-on debugging across hardware-software interfaces, emulation platforms, and silicon debug tools.…See more Engineers will work on functional verification, concurrency testing, and performance analysis for modem and RF subsystems, applying AI/ML techniques to improve validation productivity. The position offers exposure to cutting-edge data center and mobile SoCs with opportunity to build scalable solutions across diverse system architectures.

Qualcomm seeks a Verification Software Engineer to join the Modem/Chiplet Validation & Emulation team, responsible for end-to-end silicon quality across pre- and post-silicon phases. The role involves designing and scaling system-level validation content, developing bare-metal test frameworks, and performing hardware-software co-debug across SoC architectures.…See more Engineers will write C/C++ and Python code for functional and performance validation of modem and RF hardware engines, analyze failures, and apply AI/ML techniques to improve validation productivity. The position offers exposure to cutting-edge data-center and mobile SoCs, requiring strong low-level programming, debug tools expertise (JTAG, logic analyzers), and ability to work across hardware, firmware, and software teams.

As a Staff System Performance Engineer, you will research, simulate, and validate performance across Qualcomm Snapdragon chipsets, optimizing power, performance, and thermal behavior for Mobile, Compute, Automotive, and IoT platforms. You will profile complex concurrent system use-cases in emulation and software environments (Android/Linux/Windows), define performance analysis plans across multiple workloads (CPU, GPU, AI/ML), and identify optimization opportunities in SoC software and hardware architectures.…See more You will lead triage of performance issues, collaborate with cross-functional teams on power and thermal solutions, and mentor junior engineers. The role requires 4+ years of post-silicon power/performance analysis experience, strong programming skills (Python, C/C++), deep understanding of ARM SoC architecture, and the ability to communicate findings to senior leadership and drive architectural decisions.

As a Sr. Staff Engineer for Wearables at Qualcomm, you will design, develop, and validate next-generation embedded software and platforms for wearable devices.…See more You'll collaborate with cross-functional teams (hardware, systems, architecture, test) to translate use-case requirements into implementation specifications, manage code reviews and quality assurance, and deploy state-of-the-art wearables algorithms into commercial products. The role requires deep expertise in modern C++, multi-core programming on heterogeneous mobile architectures (CPUs, GPUs, DSPs, tensor accelerators), performance analysis, and established software development processes (CI/CD, testing, code reviews). You'll need 6+ years of software engineering experience and 3+ years with C++, Java, Python, or similar languages.