Next-Gen, High-Speed HBM, LPDDR Memory Subsystem ASIC Digital Design Engineer (

$101,400 – $152,200 · Posted 11 days ago

San DiegoLast seen 9 days ago

Summary

As an ASIC Digital Design Engineer, you will define, model, design, optimize, verify, and validate IP blocks and SoCs for high-performance, low-power memory subsystems (HBM, LPDDR). You'll work with cross-functional teams to develop architectures, circuit specifications, and logic designs based on system requirements, using EDA tools to execute the RTL-to-GDS flow and custom circuit design workflows. Responsibilities include creating system simulations, evaluating implementation strategies, and documenting technical specifications for ASIC projects.

Design Systems Embedded Systems Asic Design Circuit Design Design Verification Eda Tools Hbm Logic Design Lpddr Memory Subsystem Design Place And Route Power Analysis Rtl Design Rtl To Gds Flow Simulation Synthesis Systemverilog Timing Analysis Verilog Vhdl Virtuoso