Generative AI Accelerator Architect and Performance Architect

Posted 1 day ago

San DiegoLast seen today

Summary

Design and optimize custom silicon architectures for generative AI workloads on Google's mobile SoCs and TPUs. Drive ML architecture exploration, hardware/software co-design, and performance optimization across the full tech stack—from compute engines to compiler integration—working cross-functionally with research, system architecture, and PM teams. Requires 10+ years in chip architecture, performance, or compiler work, with demonstrated expertise in LLMs, Vision Transformers, and diffusion models.

Data Science Embedded Systems AI C++Machine Learning Python Chip Architecture Compiler Optimization Design Space Exploration Diffusion Models Generative AI Gpu Hardware Software Co Design Jax LLM Large Language Models Mobile Socs Npu Performance Modeling Power Analysis PyTorch TensorFlow Thermal Analysis Tpu Vision Transformers