uvm jobs in San Diego

As a CPU SoC Verification Engineer at Google, you will drive ARM-based SoC verification from RTL simulation through post-silicon debug, ensuring functional integrity of CPU subsystems. You will develop robust verification environments, execute Gate Level Simulation (GLS) and timing-annotated workflows, and partner with ATE teams to diagnose hardware failures and stabilize production patterns.…See more The role requires 4+ years of ARM SoC verification experience including cache coherency, NoC interconnects, high-speed bus protocols, and PVT corner analysis. You will translate simulation sequences into production-ready formats and debug complex hardware failures in both virtual and physical silicon environments.

As an Applications Engineering Consultant for Siemens EDA emulation tools, you will provide technical sales support to the Americas region, deploying Veloce Strato emulation and prototyping solutions for semiconductor and electronics companies. You will work directly with customers during product evaluations, troubleshoot technical obstacles, deliver presentations on new features, and gather feedback to improve products.…See more The role requires 7+ years of chip design, verification, simulation, or emulation experience with deep expertise in SystemVerilog/Verilog/VHDL, RTL coding, ASIC debug, and familiarity with industry emulation platforms (Veloce, Palladium, ZeBu) and simulation environments (Questa, Incisive, VCS). You will also need proficiency in scripting languages, Transaction Level Modeling, and the ability to communicate complex technical solutions to customers at multiple organizational levels.

As an Applications Engineering Consultant for Siemens EDA's Emulation division, you will provide technical sales support and hands-on expertise to customers evaluating and deploying Siemens Veloce Strato emulation and prototyping solutions. You'll work directly with customers during product evaluations, troubleshoot technical obstacles, deliver presentations on product features, and communicate customer requirements back to product development teams.…See more The role requires 7+ years in chip/ASIC design, verification, or emulation/prototyping, with deep expertise in SystemVerilog/Verilog/VHDL, RTL design, industry emulation tools (Veloce, Palladium, ZeBu), and simulation environments (Questa, VCS, Incisive). You'll leverage scripting languages (Python, Perl, Tcl, shell) and EDA tool integration knowledge to help customers optimize their design flows and build long-term technical relationships.

Senior Staff Center of Excellence Emulation Engineer responsible for executing emulation test plans, developing and optimizing complex SoC and subsystem hardware models across Synopsys, Cadence, and Siemens platforms. The role involves collaborating with RTL design, verification, and firmware teams to debug cross-layer issues, automate emulation flows through scripting, and drive performance optimization.…See more Requires 5–7 years of emulation experience (or 3–5 with advanced degree), expertise in SystemVerilog/UVM, and strong knowledge of processor architecture, I/O protocols, and memory technologies.

As a CPU SoC Verification Engineer, you will drive ARM-based SoC verification from RTL simulation through post-silicon debug, ensuring functional integrity of CPU subsystems. You'll develop robust verification environments, execute Gate Level Simulation (GLS) and timing-annotated simulations, and lead debug efforts to diagnose hardware failures and stabilize high-speed patterns in production.…See more The role requires expertise in RTL verification, cache coherency, Network-on-Chip interconnects, and high-speed bus protocols, with experience translating simulation sequences into ATE-ready formats using industry-standard EDA tools.