← Back to results

memory-hierarchy jobs in San Diego

$150,000 – $244,000 · Posted 15 days ago

Staff or Senior Staff Engineer responsible for system software development on MediaTek SoC platforms, including platform board bring-up, driver development for Windows/Android/Linux, and hands-on debugging of customer issues. Requires 10+ years of C/C++ and SoC system software experience, deep knowledge of peripheral buses and OS internals, and expertise in power optimization and performance analysis.… Will manage multiple concurrent tasks, coordinate with customers and support teams, and provide on-site technical support.

San DiegoLast seen 13 days ago
$155,400 – $233,200 · Posted 1 month ago

As a System Performance Engineer at Qualcomm, you will optimize and validate power, performance, and thermal behavior of Snapdragon chipsets across mobile, compute, automotive, IoT, and data center platforms. You will profile complex concurrent system use-cases in emulation and software environments (Android/Linux/Windows), define performance analysis plans across CPU, GPU, and AI/ML workloads, identify optimization opportunities in SoC architecture, and triage performance issues to root cause.… You will collaborate with cross-functional hardware, software, and architecture teams, mentor junior engineers, and prepare technical recommendations for senior leadership. The role requires strong programming skills (Python, C/C++), deep knowledge of ARM SoC architecture, memory hierarchy, system interconnects, and hands-on experience with power/performance analysis tools and benchmarks.

San DiegoLast seen 29 days ago
$179,000 – $268,400 · Posted 1 month ago

As a senior-level systems engineer on Qualcomm's System Performance Team, you will optimize and validate power, performance, and thermal behavior of Snapdragon chipsets across mobile, compute, automotive, IoT, and data-center AI platforms. You will profile and analyze complex concurrent system use-cases in emulation and software environments (Android/Linux/Windows), define performance and power analysis plans across CPU, GPU, and AI/ML workloads, identify optimization opportunities in SoC hardware and software architectures, and triage root-cause issues for stakeholders.… You will provide technical leadership and mentorship to junior engineers, collaborate with cross-functional teams to implement solutions, and develop automation to improve team efficiency. The role requires 10+ years of post-silicon power and performance analysis experience, strong programming skills (Python, C/C++), and deep knowledge of ARM SoC architecture, memory hierarchies, system interconnects, and modern AI/LLM workloads.

San DiegoLast seen 15 days ago
Posted 1 month ago

Staff Engineer role focused on CPU design, RTL development, and physical design for next-generation high-performance, low-power SoCs. Responsibilities span microarchitecture definition, Verilog/SystemVerilog RTL coding, synthesis, physical implementation (floorplanning, placement, routing, timing closure), and PPA optimization.… Will collaborate across architecture, verification, DFT, and post-silicon teams, and develop automation scripts in Python, Tcl, Perl, or Shell. Requires 4–10 years in ASIC/SoC, CPU, RTL, or physical design, strong digital design fundamentals, and hands-on experience with CPU microarchitecture and design closure flows.

San DiegoLast seen 1 month ago
$242,760 – $314,160 · Posted 1 month ago

Lead Arm's SoC interconnect technology team as a senior architect with 15+ years of experience designing large-scale SoCs. Own performance modeling, microarchitecture, RTL design, and verification strategy for interconnect IP; drive adoption of industry standards (AMBA AXI/ACE/CHI, etc.) across CPU, GPU, NPU, and memory subsystems.… Mentor a team of architects and engineers while leading complex projects to tape-out, with expertise in coherent protocols, cache coherency, latency/bandwidth/power optimization, and system-level debug.

San DiegoLast seen 24 days ago
$148,300 – $222,500 · Posted 1 month ago

As a Staff System Performance Engineer, you will research, simulate, and validate performance across Qualcomm Snapdragon chipsets, optimizing power, performance, and thermal behavior for Mobile, Compute, Automotive, and IoT platforms. You will profile complex concurrent system use-cases in emulation and software environments (Android/Linux/Windows), define performance analysis plans across multiple workloads (CPU, GPU, AI/ML), and identify optimization opportunities in SoC software and hardware architectures.… You will lead triage of performance issues, collaborate with cross-functional teams on power and thermal solutions, and mentor junior engineers. The role requires 4+ years of post-silicon power/performance analysis experience, strong programming skills (Python, C/C++), deep understanding of ARM SoC architecture, and the ability to communicate findings to senior leadership and drive architectural decisions.

San DiegoLast seen 1 month ago