Infra Systems Physical Architect

$145,600 – $218,400 · Posted 12 days ago

San DiegoLast seen 10 days ago

Summary

Design and optimize Network-on-Chip (NoC) architectures for high-performance Qualcomm SoCs with focus on physical implementation and PPA (power, performance, area) goals. Responsibilities include floorplan-driven architecture design, physical-aware synthesis strategies, clock tree planning, power analysis, timing closure, and custom placement/routing techniques. Requires deep expertise in ASIC physical design, NoC protocols (AMBA, cache coherency), and scripting in Python, Perl, TCL, and C to analyze and optimize latency, area, performance, and power metrics.

Embedded Systems Software Development Python Amba Asic Design C Cache Coherency Clock Tree Planning Custom Placement And Routing Design Compiler Dft Floorplanning Formal Verification Fusion Compiler Genus Innovus Linux Mesh Clock Tree Mmmc Noc Perl Physical Aware Synthesis Physical Design Power Domain Analysis Power Planning Prime Power Primetime Signal Integrity Source Sync Spine Tcl Timing Analysis Unix Shell