dft jobs in San Diego

Design and optimize Network-on-Chip (NoC) architectures for high-performance Qualcomm SoCs with focus on physical implementation and PPA (power, performance, area) goals. Responsibilities include floorplan-driven architecture design, physical-aware synthesis strategies, clock tree planning, power analysis, timing closure, and custom placement/routing techniques.…See more Requires deep expertise in ASIC physical design, NoC protocols (AMBA, cache coherency), and scripting in Python, Perl, TCL, and C to analyze and optimize latency, area, performance, and power metrics.

Staff Engineer role focused on CPU design, RTL development, and physical design for next-generation high-performance, low-power SoCs. Responsibilities span microarchitecture definition, Verilog/SystemVerilog RTL coding, synthesis, physical implementation (floorplanning, placement, routing, timing closure), and PPA optimization.…See more Will collaborate across architecture, verification, DFT, and post-silicon teams, and develop automation scripts in Python, Tcl, Perl, or Shell. Requires 4–10 years in ASIC/SoC, CPU, RTL, or physical design, strong digital design fundamentals, and hands-on experience with CPU microarchitecture and design closure flows.

Develop prototype AI/ML solutions for ASIC design automation at NXP, exploring state-of-the-art techniques like GenAI, reinforcement learning, graph neural networks, and CNNs to improve VLSI CAD workflows. The role involves collaborating with architecture, IP, and SoC design teams to evaluate and pilot automation applications on leading-edge semiconductor technologies.…See more Candidates must have 5+ years of AI/ML expertise, strong Python/C++ programming skills, and hands-on experience with Unix/Linux, Git, and software development tools. Understanding of VLSI design constraints, EDA tools, and physical design flows is highly desirable.

Blue Origin seeks a Technical Program Manager to lead SoC (System-on-Chip) development programs from requirements through production. The role requires managing complex hardware and semiconductor programs across multiple lifecycle phases, coordinating with highly technical engineering teams, external suppliers, and IP providers.…See more Responsibilities include change management, build-versus-buy decisions, supplier strategy, scheduling, risk management, and translating between detailed technical execution and business objectives. The ideal candidate has 7+ years of technical program management experience, a strong background in IC/SoC development, analog/mixed-signal design, digital ASIC, RF systems, or satellite communications, plus demonstrated ability to lead through tapeout, silicon bring-up, qualification, and production ramp.

Lead the product vision, strategy, and roadmap for diagnostics and debug analytics across pre-silicon and post-silicon semiconductor design phases. Own market analysis, PRD development, and technical requirements definition while serving as the subject-matter expert for DFT, silicon debug methodologies, and root-cause analysis.…See more Partner with R&D, field teams, and data science groups to build diagnostic data pipelines, anomaly-detection models, and correlation engines that accelerate SoC development and yield ramp cycles. Engage directly with customers, executives, and cross-functional teams to translate complex debugging challenges into innovative analytics solutions and drive go-to-market strategy.