tcl jobs in San Diego

Design and develop uniform global methodologies for emulation build generation and debug across FPGA-based emulation platforms at Qualcomm's SoC digital hardware organization. Collaborate with architects, designers, verification engineers, and software teams to support pre-silicon prototyping and bring-up of new SoC designs.…See more Debug low-level software and hardware issues using tools like JTAG and kernel debuggers, with expertise in Verilog/SystemVerilog, FPGA platforms (Xilinx/Intel), and scripting languages. Requires 4+ years of ASIC design, verification, validation, or integration experience, with preferred 5+ years in emulation and silicon environments.

Design and optimize Network-on-Chip (NoC) architectures for high-performance Qualcomm SoCs with focus on physical implementation and PPA (power, performance, area) goals. Responsibilities include floorplan-driven architecture design, physical-aware synthesis strategies, clock tree planning, power analysis, timing closure, and custom placement/routing techniques.…See more Requires deep expertise in ASIC physical design, NoC protocols (AMBA, cache coherency), and scripting in Python, Perl, TCL, and C to analyze and optimize latency, area, performance, and power metrics.

Staff Engineer role focused on CPU design, RTL development, and physical design for next-generation high-performance, low-power SoCs. Responsibilities span microarchitecture definition, Verilog/SystemVerilog RTL coding, synthesis, physical implementation (floorplanning, placement, routing, timing closure), and PPA optimization.…See more Will collaborate across architecture, verification, DFT, and post-silicon teams, and develop automation scripts in Python, Tcl, Perl, or Shell. Requires 4–10 years in ASIC/SoC, CPU, RTL, or physical design, strong digital design fundamentals, and hands-on experience with CPU microarchitecture and design closure flows.

As an Applications Engineering Consultant for Siemens EDA's Emulation division, you will provide technical sales support and hands-on expertise to customers evaluating and deploying Siemens Veloce Strato emulation and prototyping solutions. You'll work directly with customers during product evaluations, troubleshoot technical obstacles, deliver presentations on product features, and communicate customer requirements back to product development teams.…See more The role requires 7+ years in chip/ASIC design, verification, or emulation/prototyping, with deep expertise in SystemVerilog/Verilog/VHDL, RTL design, industry emulation tools (Veloce, Palladium, ZeBu), and simulation environments (Questa, VCS, Incisive). You'll leverage scripting languages (Python, Perl, Tcl, shell) and EDA tool integration knowledge to help customers optimize their design flows and build long-term technical relationships.

Senior Staff Center of Excellence Emulation Engineer responsible for executing emulation test plans, developing and optimizing complex SoC and subsystem hardware models across Synopsys, Cadence, and Siemens platforms. The role involves collaborating with RTL design, verification, and firmware teams to debug cross-layer issues, automate emulation flows through scripting, and drive performance optimization.…See more Requires 5–7 years of emulation experience (or 3–5 with advanced degree), expertise in SystemVerilog/UVM, and strong knowledge of processor architecture, I/O protocols, and memory technologies.