cache-architecture jobs in San Diego

Lead end-to-end DDR validation for next-generation LPDDR5X/LPDDR6 memory subsystems on AI Accelerator and mobile platforms, spanning pre-silicon through post-silicon phases. Drive memory bring-up, performance validation, system stress testing, and debug across emulation, FPGA, and silicon platforms.…See more Develop validation strategies, automation, and regression infrastructure while partnering with architecture, design, firmware, and vendor teams to resolve DDR controller, PHY, and system-level issues. Require 5+ years of DDR/memory subsystem validation experience, deep knowledge of LPDDR architectures, DDR controllers/PHYs, memory training algorithms, and strong post-silicon debug skills with C/C++ proficiency.

Senior Embedded Software Engineer role at Qualcomm's Data Center Business Unit focused on designing and developing software/firmware for cloud edge and data center ML acceleration on high-performance silicon. The role requires deep expertise in embedded systems including board support packages, device drivers, RTOS, secure boot, TrustZone, and low-speed peripherals (I2C/SPI/UART), combined with proficiency in C/C++ development, debugging with JTAG/SWD, and embedded Linux.…See more Responsibilities include ML acceleration, process-in-memory optimization, memory management, virtualization, and collaboration with cross-functional teams. Ideal candidate has 2+ years of low-level C programming and background in SoC architecture, DMA, PCIe, and multi-threaded programming.