Processor ASIC RTL Design Engineer

$127,200 – $190,800 · Posted 16 days ago

San DiegoLast seen 13 days ago

Summary

Design RTL for high-performance Hexagon/NPU processor cores used in mobile SoCs, servers, IoT, and automotive applications. Work across the full ASIC design flow from RTL through GDS2, collaborating with architecture, physical design, and verification teams on timing closure, power optimization, and area reduction. Develop SystemVerilog RTL, run frontend design tools (linting, CDC, LEC, CLP), and support hardware integration and design verification. Requires 2+ years of practical RTL development experience with microprocessor design knowledge.

Design Systems Embedded Systems Asic Design Bus Interface Design Cache Design Clock Domain Crossing Cdc Clp Common Logic Platform Computer Architecture Digital Design Gds2 Hexagon Architecture Lec Logical Equivalence Checking Linting Tools Logic Design Low Power Design Microprocessor Design Npu Neural Processing Unit Pldrc Physical Layout Design Rule Check Processor Integration Rtl Design Soc Integration Static Timing Analysis Synthesis Systemverilog Verilog