chiplet-architecture jobs in San Diego

Staff Reliability Engineer to lead reliability strategy for Qualcomm's data center products, owning reliability planning, advanced analysis (device aging, electromigration, wear-out modeling), and qualification test architecture (HTOL, bHAST/THB, ESD/LU). The role requires performing statistical failure-rate modeling, driving design-for-reliability improvements across cross-functional teams, and mentoring junior engineers to establish best practices.…See more Requires 4+ years of reliability engineering experience with expertise in JEDEC standards, silicon process technology, advanced packaging (chiplets, 2.5D/3D integration), and complex Digital SoC qualification.

Define and architect next-generation SoC infrastructure hardware components including interconnect (NoC), system cache, memory controllers, and system MMU for Qualcomm SoCs. The role requires deep expertise in multi-die/chiplet architectures, industry-standard protocols (PCIe, CXL, USB, UFS, MIPI, UCIe), and HW-SW interfaces to create developer-friendly designs.…See more Responsibilities include performance modeling, RTL design flow understanding, and trade-off analysis across quality of service, power management, security, and debug features. The position demands 4+ years of systems engineering or architecture experience with a degree in electrical engineering or computer science.