Design and optimize custom silicon architectures for generative AI workloads on Google's mobile SoCs and TPUs. Drive ML architecture exploration, hardware/software co-design, and performance optimization across the full tech stack—from compute engines to compiler integration—working cross-functionally with research, system architecture, and PM teams.… Requires 10+ years in chip architecture, performance, or compiler work, with demonstrated expertise in LLMs, Vision Transformers, and diffusion models.
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