rtl-coding jobs in San Diego

Senior ASIC design engineer role focused on next-generation high-speed HBM, LPDDR, and DDR memory subsystem architecture and RTL implementation for Qualcomm products. Responsibilities include developing memory controller and NoC-based subsystem specifications, RTL coding, micro-architecture design, synthesis, timing closure, physical design support, and gate-level simulation.…See more The role requires 5+ years of ASIC/RTL design experience, 3+ years of hardware architecture experience, and expertise in high-speed digital design (1GHz+) interfacing with CPU, GPU, DSP, and multimedia processors.