Senior Formal Verification Engineer role focused on championing formal verification strategies for Amazon's custom silicon (SoC/NoC designs). The engineer will develop reusable formal verification infrastructure, drive proof convergence on complex designs, mentor DV engineers in SVA and formal techniques, and integrate formal methods into CI/CD pipelines.… Requires 8+ years of ASIC/SoC verification experience with deep expertise in JasperGold/Questa Formal, SystemVerilog Assertions, and formal applications (FPV, equivalence checking, connectivity/register verification); proficiency with AI/LLM tools to accelerate formal workflows is expected.
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