Senior Staff Center of Excellence Emulation Engineer responsible for executing emulation test plans, developing and optimizing complex SoC and subsystem hardware models across Synopsys, Cadence, and Siemens platforms. The role involves collaborating with RTL design, verification, and firmware teams to debug cross-layer issues, automate emulation flows through scripting, and drive performance optimization.… Requires 5–7 years of emulation experience (or 3–5 with advanced degree), expertise in SystemVerilog/UVM, and strong knowledge of processor architecture, I/O protocols, and memory technologies.
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